Checking if a register contains 8000h

(or 80000000h):

Tiny Little Instructions

CBW/CWD/CDQ/CWDE are the short ways to clear/set AH/DX/EDX/upper word of EAX when the MSB of AL/AX/EAX/AX is known in advance.

Writing a two-digit number

Let's suppose we want to write out a two-digit number in any numerical system between [2..10]. Value comes in AL, the base of the numerical system is in AH.

HLT

HLT can be useful! It's very easy to make timings with it:

Macro fun

Let me ask You one of my favourite questions! Which programming language is this:

Optimizing for coding time

Look at this:

Puzzle Solution

A possible solution for the riddle:

LEA strikes back

Most of us love the LEA instruction because of its wide usability. One of the possible uses is when it's used to multiply:

Aligned fill (Kicking out conditional jumps, part I)

Back to the stoneage : filled vectors. The most dirty solution for filling a horizontal line (instead of a rep stosb) is probably this:

Use ES

Are You bored of writing

Introducing a new video resolution

In 256-color modes using two screen pages was always a big pain. We had to deal with chain-4 mode or VESA or SVGA registers. Basically, on a 'standard' VGA card in 'chunky' mode there's no way to reach the card's memory above 64k. So what can we do with the usable 64k? If we want to use it for two screen pages, one page eats 32k, which resolution is it enough for? Well, a resolution of 256*128 is a possible choice. With this we have can handle two pages... How to initialize this mode:

The next topic was written by LEM - jeanmarc.leang@ping.be

Fast way to clear the screen

(by using less colors in 256c mode)

Let's say You use 32 colors, the first 32 and put black to the registers left. In the next frame put black to the first 32 registers and restore the 32c palette in the next 32 registers. and so on... prob... after 8 frames you'll reach the end of the palette and go back to the first 32 colors... (if You use 1 col/frame you'll reach the end of the palette after 256 frames ofcoz) so you'll see the old crap you left 8 frames earlier...

Hehehe,
DID YOU REALLY THINK THAT WAS ALL ???

You can actually clear the screen with that technique!
Let's say You want to draw points in 1 color (works for 1 -> xx colors !!!) You take 200 colors for the trick which makes 56 colors left; use them for a logo for example, a size of 64*200 (any size, but just to show you it works) and put it somewhere on the screen (let's say on the left). Now You've got 200 colors left, so you can display points during 200 frames before having garbage on the screen, RIGHT?

WRONG!!! You can display points forever without garbage!

Uncle Ben's wisdoms of the month

Remember, a NEG + DEC pair equals a NOT. And the DEC/INC doesn't change the carry flag. You may need it some day...

Intel processor bug???

I've faced (again...) an interesting problem during the development of some 32-bit interface. Let's say we don't need the 0..7 interrupts, so there are no interrupt gates in the memory where the IDT starts. The first valid int gate is No. 8 , which is at IDT's base+40h. The problem is that when an interrupt occurs in 32-bit protected mode, and the interrupt handler's code is in the beginning of the IDT (in those unused 40h bytes), the processor shuts down, but when the int handler's code is somewhere else, everything is okay. Do you have any ideas...?

Calculating the absolute value of AX

This wonderful 'gem' was developed by Laertis / Nemesis.

Pixel drawing in protected mode

Here comes a 'routine' which sets a pixel to the given value in 256-color mode: (parameters: EAX=X coordinate, EBX=Y coordinate, CL=color)

Simple recursive calls

Sometimes we have to call one subroutine many times like this:

Hardware scroll with one page

First a few words about vertical hardware scrolling. The 'standard' scroll requires at least two pages. In the beginning the first page is visible, and it's black. Then the screen goes up one row - the first row of the second page appears at the bottom. Now this row is copied to the 1st row of the 1st page (which row is now invisible). This process continues until the 2nd page is entirely visible. At this point the two pages are identical. Now the 1st page is displayed again and the whole process starts from the beginning. The problem with it is the memory requirememnt, which is too big. With this method it's impossible to make a 640*480 scroll since one page occupies more than 128k video memory. But why do we need two pages? Because the video memory is not 'circular'. I mean if we'd scroll the screen up by one pixel, the 1st row of the video memory which was on the top of the screen now would be at the bottom. With this kind of video memory we could do a smooth vertical scroll with a single page: in the beginning, the screen is black. Now wait for a vertical retrace, then change the 1st row, and shift the screen up by one row that the previously modified row appear in the bottom. Perfect eh? The question is how can we make 'circular' memory... It's a well-known fact that there's a certain problem with the hardware scroll on TSENG cards: every second page contains some 'noise' instead of the scroll we're expected to see... The cause of this is the 'memory display start' register (3d4/0c,0d) which works a bit different than other cards. At other cards always only the first 256k of the video memory will be displayed on the screen, even if the memory display start register is set close to the end of the 256k. These cards handle this 256k memory as a circular buffer, but the TSENG boards not:

Normal VGA & TSENG is different!

	Normal VGA	TSENG VGA
Memory Display Start Register = XXXX	Video memory: XXXX-3ffff	Video memory: XXXX-3ffff
	00000- Display memory wraps to zero!	40000- Dispalying the video memory continues!

So what we can do is 'emulate' the standard VGA circular buffer with the LINE COMPARE REGISTER (3d4/18h). The function of this register is pretty simple: if the scanline counter reaches this value, the display address wraps to 0, beginning of the video memory:

Normal VGA & TSENG is the same!

	Normal VGA	TSENG VGA
Memory Display Start Register = XXXX	Video memory: XXXX-3ffff	Video memory: XXXX-3ffff
Line Compare Register	00000- Display memory wraps to zero!	00000- Display memory wraps to zero!

The *big* advantage is that it's possible to emulate shorter than 256k circular video memory! It should work on all VGA cards. The most elegant way is to add a Line Compare Register changer code to the Memory Display Start register modifier routine. With this the existing 'standard' scrollers can be fixed for TSENG cards too. Remember, the line compare register is 10-bit, the highest two bits are located in 3d4/7/4. bit and 3d4/9/6. bit.

Gouraud shading - 2 instructions/pixel

The main goal of this example is not really to show a G-shading with two instructions ;-) It's rather an example for 'how to pray down the upper words of 32-bit registers without shifting. There's often a need for calculating with fixed-point numbers: a doubleword's upper word is the whole part, the lower is the fractional part. The problem is that the upper words of the 32-bit registers are hard to reach. For example, at ADD EAX,EBX how to get EAX's upper word? No (quick) way :-( The idea beyond the trick is changing the upper & lower words, and using ADC instead of ADD:

Demand paging on SVGA boards in PM

(This is going to be deep protected mode system coding, be prepared...) It would be very nice to 'map' the video memory to the linear address space so we could reach it as a one megabyte long array. Some cards support it, the rest not: at these cards only the 'bank switching' routines allow to access the entire video memory. Our goal is to reduce the number of bank switches as possible. Several techniques has been developed, but many of them has a big problem: the routine which determines whether a bank-switch is necessary must run very much times. The next method solves this problem. It maps an 1MB long memory area to the video memory on any SVGA card, and bank-switch will occur only if necessary. It works in protected and flat virtual mode only, NOT in (flat) real mode. Essentially it's a kind of 'virtual memory' technique based on PAGING. Let's set up the 4k-page table reserving one megabyte above the highest physical memory address (let's say from 800000h to 8ffffffh) and map it to a0000h by 64k steps:

000000-7fffff mapped to 000000-7fffff, it's the normal mapping

Physical address	Logical address
000000-000fff	000000-000fff
001000-001fff	001000-001fff
002000-002fff	002000-002fff
...	...
7ff000-7fffff	7ff000-7fffff

It's 800000-80ffff mapped to a0000-affff

Physical address	Logical address
800000-800fff	a0000-a0fff
801000-801fff	a0100-a1fff
...	...
80f000-80ffff	a0f00-affff

It's 810000-81ffff mapped to a0000-affff

Physical address	Logical address
810000-810fff	a0000-a0fff
811000-811fff	a0100-a1fff
...	...
81f000-81ffff	af00-affff

It's 820000-82ffff mapped to a0000-affff

...

...

It's 8f0000-8fffff mapped to a0000-affff

Physical address	Logical address
8f0000-8f0fff	a0000-a0fff
8f1000-8f1fff	a0100-a1fff
...	...
8ff000-8fffff	af00-affff

Great. From 8 to 9 megabytes we can address the a0000 - affff segment sixteen times. Now comes the TRICK. Mark all 4k pages between 810000- 8fffff as 'NOT PRESENT' and pages in 800000-80ffff as 'PRESENT', and hook interrupt 0e ('page fault' exception). If a page fault occurs, it means that a bank switch needed - mark the accurate pages as 'PRESENT' and old ones as 'NOT PRESENT', do the bank-switch, and return from the exception. The fault handler looks like this:

Filling a register with the Carry flag

Sometimes we need to fill a register with the carry flag: put 0 to the desired reg if Carry=0 or put ffffffff if Carry=1. Probably the fastest way to do it (for example, with EDX):

BSWAP with 16-bit register

Yeah, BSWAP with a word register operand is a valid instruction. At least in the genuine Intel processors. Some specifications recommend against using it for better compatibility with Intel-clones. Anyway, if it works, it brings down the upper word of the doubleword register without affecting its upper 16 bit.For example, if EAX=ab120000 then

Operand sizes

At instructions where the operand is small (like 'ADD EBX,12'), the machine code is shorter since the operand is stored in 8 bits and will be sign- extended to 32-bit when the instruction actually runs. This means that all operand values in the [-128..127] range (hexadecimally [ffffff80..0000007f]) save 3 bytes per instruction. There's only one trick concerning it. When using 'ADD EBX,80h', the operand takes 4 bytes, since 00000080h falls out of the range. But the

Rounding

Let's say we want to divide a number by a power of two (2, 4, 8, 16, etc.) then rounding it upwards. In this case

Penalties on the 486

In most cases, the 486 is free from flow-dependence penalties which mean that an instruction which uses the result of the previous instruction will not cause slowdown:

Aligning inner loops

Aligning the first instruction of an 'inner' loop to 16-byte boundary may increase performance: the 486's and the Pentium Pro's instruction prefetcher (or what) just loves aligned addresses. But the straight-forward solution:

Aligning a memory pointer

After allocating a few doublewords it's not sure that the array's starting address is on dword boundary, we have to adjust it:

Kicking out conditional jumps, part ][

When optimizing for the Pentium (or for Pentium Pro with respect for compatibility) it might save some cycles to change the conditional jumps to non-branching code. For example, the next code sequence implements this IF constuction:

If I had knuwn dat kodin' o' de Intel family is sooo diffiqlt, I'd have stayed at mine ZX Spektrum for ever!